k-mer counting with FPGAs and HMC in-memory operations

Wertenbroek, Rick (School of Management and Engineering Vaud, HES-SO // University of Applied Sciences Western Switzerland) ; Thoma, Yann (School of Management and Engineering Vaud, HES-SO // University of Applied Sciences Western Switzerland)

k-mer counting is an essential algorithm found in many genomic related processes. It may seem like a rather trivial task but is in fact computationally expensive due to the sheer amount of data. The ever growing rate at which data is generated in genomics requires the creation of novel solutions leveraging new technologies to keep up the pace. In this paper we explore the use of in-memory operations of Hybrid Memory Cubes (HMC) to accelerate k-mer counting. The resulting accelerator is compared to an existing accelerator also using HMC memory, as well as state of the art k-mer counting software. The use of in-memory operations resulted in a 14.6% to 16.9% performance improvement over using the HMC without them. The accelerator showed a speed-up of 3-4x over software when running with a single FPGA and HMC and a speed-up of 16-17x when using 4 FPGAs and 4 HMCs.


Keywords:
Conference Type:
full paper
Faculty:
Ingénierie et Architecture
School:
HEIG-VD
Institute:
ReDS - Reconfigurable & embedded Digital Systems
Subject(s):
Ingénierie
Publisher:
Edinburgh, UK, 6-9 August 2018
Date:
2018-11
Edinburgh, UK
6-9 August 2018
Pagination:
8 p.
Published in:
Proceedings of 2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 6-9 August 2018, Edinburgh, UK
DOI:
ISSN:
2471-769X
ISBN:
978-1-5386-7753-7
Appears in Collection:

Note: The status of this file is: restricted


 Record created 2019-04-23, last modified 2019-04-23

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