Neuromorphic hardware as a self-organizing computing system

Khacef, Lyes (LEAT, University Côte d'Azur, France) ; Girau, Bernard (University of Lorraine, Loria, France) ; Rougier, Nicolas (Inria Bordeaux Sud-Ouest, LaBRI, University of Bordeaux, CNRS, Bordeaux, France) ; Upegui, Andres (School of Engineering, Architecture and Landscape (hepia), HES-SO // University of Applied Sciences Western Switzerland) ; Miramond, Benoît (LEAT, University Côte d'Azur, CNRS, France)

This paper presents the self-organized neuromorphic architecture named SOMA. The objective is to study neural-based self-organization in computing systems and to prove the feasibility of a self-organizing hardware structure. Considering that these properties emerge from large scale and fully connected neural maps, we will focus on the definition of a self-organizing hardware architecture based on digital spiking neurons that offer hardware efficiency. From a biological point of view, this corresponds to a combination of the so-called synaptic and structural plasticities. We intend to define computational models able to simultaneously self-organize at both computation and communication levels, and we want these models to be hardware-compliant, fault tolerant and scalable by means of a neuro-cellular structure.


Keywords:
Conference Type:
short paper
Faculty:
Ingénierie et Architecture
School:
HEPIA - Genève
Institute:
inIT - Institut d'Ingénierie Informatique et des Télécommunications
Publisher:
Rio de Janeiro, Brazil, 8-13 July 2018
Date:
2018-07
Rio de Janeiro, Brazil
8-13 July 2018
Pagination:
3 p.
Published in:
Proceedings of IEEE World Congress on Computational Intelligence (WCCI), International Workshop: Neuromorphic Hardware in Practice and Use (NHPU), 8-13 July 2018, Rio de Janeiro, Brazil
Appears in Collection:



 Record created 2020-08-25, last modified 2020-10-27

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